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 * Constant

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 * Concurrent Assignments

 * Process

 * Sequential Statements

 * Variable

  * User Defined Types

 

Variable Declaration

Variables can be declared in process, function or procedures.

Syntax:

Variable variable_name :data_type:=initial_vlue;

Example:

Varible temp:std_logic_vector(3 downto 0);
Variable temp:integer;

Variable Assignment

For variable assignments, " := " symbol is used. These assignments are done instantly. Any delay will not occur during assignment.

Example:

variable reg :std_logic_vector(3 downto 0);

Signal Assignment

All values

Reg:=1111;
Reg:=xF;(hexadecimal)

One bit assignment

Reg(2):=0;

Multiple bit assignment ( Bit slicing)

Reg(1 to 2):=10;

Single quotes (' ')are used for one bit assignments.
Double quotes (" "') are used for multiple bit assignments.

 

 

 

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