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 * Project Definition

 * Create A New Library

 * Sample VHDL Codes

  * Simulation


Before using your own library in the design, you should simulate the library for verification. There are some methods and simulation software to do so. In this tutorial we simulate the library using ModelSim.

Open the ModelSim .

Select File>New> Library from menu bar

In Create a New Library dialog box type your library name in both Library Name and Library Physical Name and tick "a new library  and a logical mapping to it" as shown below. Then click the OK.

Now you can see your library in workspace window.

Select Compile>Compile from the menu bar

In Compile Source Files dialog box  select your library in library part and select your package. Then click compile and Done to finish the compilation.

So far you create a new library and compile the your package in the library. Now you can simulate your library using test code created previous section.

Select File>New project from menu bar

In create Project dialog box type a meaningful name (whatever you want ) . Type work in Default Library Name field and determine the project location where the project will be saved in Project Location Field. Click Ok to complete the project.

Note: You don't confuse your library with Work library. Work library is a working library. This means that in a design all VHDL Codes are implemented in a default library called work .  As for your Library , it only includes your package created previous section.

In Add items to the project  dialog box  select add existing file and the opened window select the files which you want to simulate. Click Open and then Close.

Not: For multiple choice , use CTRL key

Highlight the Project  by left-clicking in workspace window and right click then select Compile>compile Selected. With process you will compile the project.

You can easily notice hat the question mark under the status column turns the mark. This mark shows that your project was compiled successfully .

Select Simulate>Start Simulation from menu bar.

In Start Simulation dialog box click '+' next to work to expand and select test program by left clicking . Then click the OK

If you don't see work library in Start Simulation dialog box, select   File>new library and create a new library named work.

Select the the Sim Part from bottom of the workspace window. And then highlight the project and left click. from pop-up menu select Add/Add to Wave. So that you added all inputs and outputs of test program to the wave window.

Note: To open any windows select File>View options

In order to simulate the design to verify you should give values the inputs. So that you can observe the output response of the design.
To do so, In the wave window select the "in1" and right click. Then select the force from pop-up menu.

And Source Selected Signal dialog box enter a value for in1 as shown below and press OK.

Make the same processes to the In2 and give a value. And adjust the simulation time step as shown below.

Select Simulate >Run>Run from menu bar.

After ┬áthe simulation  you will get the result below:


Congratulations.Now you have a working library and you can use it in any design you demand.


Test Bench                                                                                                                


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