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ALIAS

It provides to group a signal which is defined in different names.

alias alias_name: alias_type is object_name;

EXAMPLE:

http://www.fpganedir.com/VHDL/RES%C4%B0M/ALLIAS_clip_image002.jpg

signal Data_Stream :Std_Logic_Vector(15 downto 0);
alias adress : Std_Logic_Vector(3 downto 0) is Data_Stream (15 downto 12) ;
alias a_check : Std_Logic is Data_Stream (11);
alias Data_R: Std_Logic_Vector (8 downto 0) is Data_Stream (10 downto 2);
alias data_check : Std_Logic_Vector (1 downto 0) is Data_Stream (1 downto 0);

Adress<=”0000”
a_check<=’1’;
Data_R<=”010101011”
data_check<=”00”

With the code above,  Data_Stream= “0000101010101100”.

In this definition,  adress and  Data_Stream (15 downto 12) have the same value. i.e in this manner, we grouped and named the Alias and Data_Stream. So this makes the code more readable.

If you assign data_stream as :

Data_stream<=“1111000010101101”

all the subgropus are assigned automatically as follows:

Adress=1111
a_check=0
Data_R =000101011 
data_check=01

                                                                                                          

    

                                                                                                                                    

 

                                                                                                                                                                                                                                                                   

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