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OPERATORS

ARITHMETIC OPERATORS

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LOGICAL FUNCTIONS

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EXAMPLE 1

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity LOGIC_FUNCTION is
     Port (¬† input1¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬† : in¬† STD_LOGIC;
                input2¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†  : in¬† STD_LOGIC;
                out_and¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†  : out¬† STD_LOGIC;
                out_not_input1 : out ¬†STD_LOGIC;
                out_not_input2 : out ¬†STD_LOGIC;
                out_or¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†   : out ¬†STD_LOGIC;
                out_xor¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†  : out ¬†STD_LOGIC;
                out_xnor¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬† : out ¬†STD_LOGIC);
  end LOGIC_FUNCTION;

architecture Behavioral of LOGIC_FUNCTION is
    begin
         out_not_input1¬†¬† <= ¬†NOT input1;
         out_not_input2¬†¬† <=¬† NOT input2;
         out_and¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†   <=¬† input1 AND input2;
         out_or¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†    <=¬† input1 OR input2;
         out_xor¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†     <=¬† input1 XOR input2;
        out_xnor¬†¬†¬†¬†¬†¬†¬†¬†¬†¬†    ¬† <=¬† input1 XNOR input2;
end Behavioral;

After running simulation on ModelSim, we get the following waveform.

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RELATIONAL OPERATORS

2

SHIFTING OPERATORS

"Shift" operator is used for shift processes which apply to one-dimensional arrays of type BIT and BOOLEAN. At the end of the process, an array of the same type occurs. Shift operator functions are available in IEEE.numeric_std library.

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EXAMPLE 2

Value =01111011

Value rol 1=11110110
Value rol 2=11101101
Value rol -1=10111101

Value ror 1=10111101
Value ror 2=11011110
Value ror -1=11110110

Value sll 1=11110110
Value sll 2=11101100
Value sll -1=00111101

Value srl 1=00111101
Value srl 2=00011110
Value srl -1=11110110

EXAMPLE 3

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.numeric_std .ALL;

entity example is
      Port ( deger_rol_1¬† : out¬† Signed (7 downto 0);
                 deger_rol_2¬† : out¬† Signed¬† (7 downto 0);
                 deger_rol_n1 :out¬† Signed (7 downto 0);
                 deger_ror_1¬† : out¬† Signed (7 downto 0);
                 deger_ror_2¬† : out¬† Signed¬† (7 downto 0);
                 deger_ror_n1 out¬† Signed (7 downto 0);
                 deger_sll_1¬† : out¬† Signed (7 downto 0);
                 deger_sll_2¬† : out¬† Signed¬† (7 downto 0);
                 deger_sll_n1 : out¬†Signed (7 downto 0);
                 deger_srl_1¬† : out¬† Signed (7 downto 0);
                 deger_srl_2¬† : out¬† Signed¬† (7 downto 0);
                 deger_srl_n1 : out¬†Signed (7 downto 0));
end example;

architecture Behavioral of example is
signal temp: signed(7 downto 0):="01111011";
   begin
       deger_rol_1¬† <= temp rol 1;
       deger_rol_2¬† <= temp rol 2;
       deger_rol_n1 <= temp rol -1;
       deger_ror_1¬† <= temp ror 1;
       deger_ror_2¬† <= temp ror 2;
       deger_ror_n1 <= temp ror -1;
       deger_sll_1¬† <= temp sll 1;
       deger_sll_2¬† <=¬† temp sll 2;
       deger_sll_n1 <=temp sll -1;
      deger_srl_1¬† <= temp srl 1;
      deger_srl_2¬† <= temp srl 2;
      deger_srl_n1 <= temp srl -1;
end Behavioral;

After running simulation on ModelSim, we get the following waveform.

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